sycl : support to malloc memory on device more than 4GB, update the doc and script (#17566)
Co-authored-by: Neo Zhang Jianyu <jianyu.zhang@intel.com>
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@@ -91,7 +91,10 @@ if (GGML_SYCL_F16)
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add_compile_definitions(GGML_SYCL_F16)
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endif()
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if (GGML_SYCL_TARGET STREQUAL "NVIDIA")
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if (GGML_SYCL_TARGET STREQUAL "INTEL")
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add_compile_definitions(GGML_SYCL_WARP_SIZE=16)
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target_link_options(ggml-sycl PRIVATE -Xs -ze-intel-greater-than-4GB-buffer-required)
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elseif (GGML_SYCL_TARGET STREQUAL "NVIDIA")
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add_compile_definitions(GGML_SYCL_WARP_SIZE=32)
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elseif (GGML_SYCL_TARGET STREQUAL "AMD")
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# INFO: Allowed Sub_group_sizes are not consistent through all
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@@ -100,7 +103,8 @@ elseif (GGML_SYCL_TARGET STREQUAL "AMD")
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# Target archs tested working: gfx1030, gfx1031, (Only tested sub_group_size = 32)
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add_compile_definitions(GGML_SYCL_WARP_SIZE=32)
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else()
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add_compile_definitions(GGML_SYCL_WARP_SIZE=16)
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# default for other target
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add_compile_definitions(GGML_SYCL_WARP_SIZE=32)
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endif()
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if (GGML_SYCL_GRAPH)
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@@ -515,9 +515,6 @@ void ggml_sycl_cpy(ggml_backend_sycl_context & ctx, const ggml_tensor * src0, co
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const int64_t ne = ggml_nelements(src0);
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GGML_ASSERT(ne == ggml_nelements(src1));
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GGML_ASSERT(ggml_nbytes(src0) <= INT_MAX);
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GGML_ASSERT(ggml_nbytes(src1) <= INT_MAX);
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GGML_TENSOR_BINARY_OP_LOCALS01;
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SYCL_CHECK(ggml_sycl_set_device(ctx.device));
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